1. Field of the Invention
The present invention relates to a clock generating circuit, more particularly to a clock generating circuit which boosts the voltage level of an input clock higher than the voltage level of a power source, thereby producing a boosted output clock.
2. Description of the Prior Art
Usually, in semiconductor circuits driven by power sources, the signals appearing in the circuits cannot have voltage levels higher than that of the power sources. Along with recent improvements in the characteristics of semiconductor circuits, however, a strong demand has arisen for some signals appearing in the circuit to have a voltage level higher than that of the power source.
For example, in a dynamic memory and the like, it has been proposed to raise the level of the signal to be applied to each word line higher than the power source voltage level, thus increasing the amplitude of current flowing from the selected memory cell to the corresponding bit line and enabling perfect read and write data operations.
Generally speaking, this can be effected by a clock generating circuit which receives an input clock and produces an output clock having a voltage level higher than the power source voltage. The present invention concerns such a clock generating circuit.
There are problems, however, with the prior art clock generating circuit. First, it is not easy to drive the circuit with low power. Second, it is difficult to achieve high speed operation.